OSI Reference Model: Layer 4 Hardware
If you would like to read the other parts in this article series please go to:
- OSI Reference Model: Layer 1 Hardware
- OSI Reference Model: Layer 2 Hardware
- OSI Reference Model: Layer 3 Hardware
If you would like to be notified when Russell Hitchcock releases the next article in this series please sign up to the WindowsNetworking.com Real time article update newsletter.
Connection oriented networks
Connectionless networks
Multiplexing

Figure 1: Logic gate schematic of a two input mux. Courtesy of www.cs.uiowa.edu

Figure 2: Basic logic gates. Courtesy of www.cs.uiowa.edu
Demultiplexing
If you would like to read the other parts in this article series please go to:
- OSI Reference Model: Layer 1 Hardware
- OSI Reference Model: Layer 2 Hardware
- OSI Reference Model: Layer 3 Hardware
If you would like to be notified when Russell Hitchcock releases the next article in this series please sign up to the WindowsNetworking.com Real time article update newsletter.